ADAU1701, Generic use of DVDD on application schematics

Korey Question

Sep 28, 2012 00:00

Hi,

I'm using the ADAU1701 DSP with Sigma Studio IDE. I'm having issues with it working sometimes and then not.

My question to start is pertaining the datasheet. It shows on the application schematic DVDD being feed by ~1.8VDC through a transisitor feediing DVDD on the chip... this is clear and also the electrical spec of what DVDD is clear. Whats NOT clear is that the schematic shows EVERYTHING being feed by DVDD. This makes NO sense at all and is VERY confusing. This is a rev B datasheet. I can conclude that IOVDD and PVDD and AVDD are ok on my 3.3V rail. Since the core is operating with the 1.8V DVDD, I cannot determine what PLL_MODE0 and PLLMODE1, PLL_LF decouling caps, SELFBOOT, Vcc on the EEPROM etc need.

Please clarifiy where DVDD should be used and how its used in this schematic.

Thanks for your help.

Korey

Audio Signal Processors

SigmaDSP Audio Processors

adau1701

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KJBob Reply

Sep 29, 2012 00:00

Hi Korey,

You are correct, the generic use of the label "DVDD" in the datasheet's application schematics (pages 49-51) does muddy up things. In reality all power pins get 3.3V except fot the core DVDD pins fed by the transistor (or an available 1.8V source). One of the helpful ADI engineers that monitor this forum will likely reply below and perhaps get the datasheet fixed. In the meantime, a correct shematic can be found in the users' guide for the -1701 eval board, page 8 of EVAL-ADAU1701MINZ.pdf. Where the caps go is covered in the doc shown below,although the diagram is for a different SigmaDSP chip with more pins:

https://ez.analog.com/docs/DOC-1889

With the issues you're experiencing of sometimes working, sometimes not -- searching for your specific symptoms may locate a useful thread. Otherwise, try posting this difficulty in case someone has experience with this problem and its solution.