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With regards ADAU1442

SigmaDSP & SigmaStudio wallman16 Apr 22, 2012 00:00 2 replies Original on forum ↗
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wallman16 Question
Apr 22, 2012 00:00

Hi ,

Could you please let me know know can we convert Leftjustified 16 bit audio data to IIS 16 bit Auto using the following setting .

Input Data
Serial Input setting

fs = 22.05kHz
Master/Slave = Slave

BCLK = 32fs
BCLK = Negative

LSB Justified 16bit
LRCLK = Negative

Master
WordLength = 16bit

LeftJustified(Delayed by 0)

Output Data
Serial Output setting

fs = 48kHz
Master/Slave = Master

BCLK = 64fs
BCLK = Negative

I2S 16bit
LRCLK = Negative

WordLength = 16bit

I2S(Delayed by 1)

Thanking you

With best regards and wishes

Audio Signal Processors

adau1442

SigmaDSP Audio Processors

SigmaDSP

ADIApproved Reply
Apr 23, 2012 00:00

Hi,

As this relates to the ADAU1442, I have moved this discussion from the Processors and DSP community to the SigmaDSP Processors and Development Tools community. Please continue the discussion here.

Regards,
Craig.

ADIApproved Reply
Apr 23, 2012 00:00

Hello,

I want to make sure I understand the input format. You say that it's two channels, 16-bit, and 32 BCLK cycles per frame, correct? That means that there are no "padding" bits... i.e. all bits contain data. Is that correct?

In other words, the 32 BCLK cycles look like this:

... R15 L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 L0...

Is that correct?

If so, then unfortunately the ADAU1442 will probably not be able to handle this data. It expects at 32 BCLK cycles per channel, which would make for a total of 64 BCLK cycles for 2-channel data.