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ADAU1701: SPI activity causing audio glitching?

SigmaDSP & SigmaStudio SteveL Mar 16, 2012 00:00 2 replies Original on forum ↗
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SteveL Question
Mar 16, 2012 00:00

Hi,

I am working on a system that uses four ADAU1701s, loaded and controlled by a master microcontroller (PIC).

All are clocked with an externally generated 24.576MHz system clock.

One of the 1701s acts as a master for the audio clocks (BCLK, LRCK) and the other three are slaved to it. Sample rate is 96kHz.

The PIC updates each of the SigmaDSPs using safeload writes via SPI every 30ms or so.

The SPI clock is 2MHz, derived from the PIC's clock and hence asynchronous to the SigmaDSP clocks.

It all largely works, but:

I am getting large-amplitude, short-duration spiky glitches on the audio from the "master" 1701 whenever there is activity on the SPI bus.

The glitches are not regular or visibly periodic.

If I halt the PIC, or just disable the SPI updates, the spikes disappear.

Both analogue (DAC) and digital outputs from that 1701 are affected.

The three "slave" 1701s do not seem to be affected.

Here's the killer - not only do the SPI writes not need to be to that particular 1701 in order to cause the effect, they do not even have to be proper SPI writes at all. Activity on any of the three SPI lines (CDATA/CLATCH/CCLK) causes the problem to a greater or lesser degree.

Obviously that points to a PCB layout issue, with crosstalk between tracks, but the problem was still present even when I connected CCLK directly to the 1701's pin via a flying wire (with CLATCH and CDATA quiet).

I considered whether ringing on sharp signal edges might be a problem and added a 100R resistor in series with the CCLK driver. This seemed to improve matters, but reactivating CDATA brought the problem back and a second 100R in series with CDATA did not help.

I am running short of ideas for things to try - has anybody else seen anything like this? Any suggestions for areas to investigate or possible causes for such a problem? Anything obvious I am missing?

I'm going to double-check the hardware carefully (I do not have a second prototype available to compare with) to try and rule out any constructional errors (missing GND, perhaps?), but apart from that am temporarily stumped. Any assistance would be gratefully received!

Kind regards,

Steve L.

Audio Signal Processors

SigmaDSP Audio Processors

adau1701

SteveL Reply
Mar 22, 2012 00:00

Well, in the absence of any suggestions I kept plugging away and can now answer my own question!

Although I was buffering the 24.576MHz master clock before distributing it to the multiple ADAU1701s, I was taking the audio BCLK and LRCK directly from the "master" SigmaDSP. It turns out that that was just too much loading for the relatively weak GPIO outputs and (presumably) the clock edges were suffering.

Buffering BCLK and LRCK in the same way as the master clock (using a high-drive-capability 74LCX245 buffer) removed the glitching completely. What I can't entirely explain is why the glitching only occurred when SPI writes were taking place - this turned out to be a bit of a red herring. Perhaps crosstalk from the SPI lines was just enough to wreck an already-slow clock edge.

Anyway, problem solved. The #1 lesson I have learned from this is that I need to invest in a higher-bandwidth oscilloscope, with which I would probably have diagnosed the problem a lot quicker. At the moment, anything vaguely HF looks a bit like a sinewave...

Kind regards,

Steve L.

ADIApproved Reply
Mar 23, 2012 00:00

Hi Steve,

Sorry that I couldn't reply earlier. I'm currently on a business trip in Tokyo and I haven't been able to keep up with support on the forum for the last week or so. I appreciate that you posted the answer to your question for the benefit of other SigmaDSP users. Without more details like screenshots of the signals on your board, it's hard for me to diagnose, but I agree with your conclusions based on the information you do have.

Brett