ADAU1442 CLKOUT and SPDIF
Hi all,
I've currently connected the CLKOUT to the chip which interprets the TDM8 output of the ADAU1442. This solves the issue from my previous post (ADAU1442 Clocks). However, is it possible to route the same signal to 3 ADC and one DAC chip as well or will there be a buffer needed? Does anybody has experience with this?
To use the internal SPDIF from the ADAU1442, I read in the data sheet that only an ac capacitor for both RX as TX are needed. Does anybody know which value will work?
Thanks in advance!
Best regards,
Guy
Audio Signal Processors
adau1442
SigmaDSP Audio Processors
Hello,
The ADAU1442 evaluation board has the CLKOUT signal connected to two codecs and an off-board connector, and the drive strength appears to be fine. However, the design and layout of your PCB, as well as the characteristics of the input buffers on the devices being driven by the CLKOUT pin, will play a role in how the signal integrity looks on your board.
Depending on the trace length and layout, you may get some reflections on the CLKOUT line that could cause issues with signal integrity. Some sort of line termination will be necessary.
There is an interesting article about clock termination available on the Analog.com website, here: https://www.analog.com/library/analogDialogue/archives/44-01/clock_termination.html
Some combination of Series Termination and CMOS AC Termination will probably be necessary, depending on the design of your board.
I suggest leaving space for an R on the driver side and an RC on the receiver sides so you can play with the values on the finished PCB until you get something that you're satisfied with.
If you use computer-aided signal integrity simulation software like HyperLynx (http://www.mentor.com/products/pcb-system-design/circuit-simulation/), you can grab the IBIS models from the ADAU1442 web page and use those to simulate the behaviour of the clock signals on your board. We use these simulations regularly and they are extremely accurate.
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