ADAU144x jitter on BCLK and LRCLK?
Is it some jitter on ADAU144x on BCLK and LRCLK signals, when configured as master? Or their clock is hard-linked to master clock of the DSP?
I provide a clock signal to a digital transmitter from LRCLK, but it lost PLL lock very often and I try to find the reason for that.
When the serial ports are configured in master mode, the LRCLK/BCLK pairs are derived from the internal master clock. This should be a very precise clock and should be low-jitter. What are you supplying as the master clock input to the ADAU144x? The internal clock is generated from this external clock, so its quality will depend on the quality of the input clock.
I checked with external clock source, configuring ADAU1445 as slave and get same results. It seems that my problem is caused by the long tracks and signals on nearby tracks.
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