4 ADC input's for ADAU1701 and no TDM output
Hi there,
I have build my project now. I'm using an AD1974 4Ch-ADC in stand-alone mode as master and an ADAU1701 to get the 4 channels of Audio to the DSP. And it's working fine.
Now the problem I have is to output a TDM stream in master Mode. I set up MP6 - Out TDM 8 Ch, MP10 - Lrclk_out and MP11 - Bclk-out. On the output of MP11 I get a 12.288Mhz Clock signal and a Lrclk signal on MP10, but no datastream on MP6.
If I set up Bclk Frequency and the outputs MP6,MP7,MP8 and MP9 to get I2S I have audiodata.
What did I miss?
Kind regards, Celso
P.S.: Kind like to thank Analog Devices for the provided samples and the great support
Audio Signal Processors
Integrated/Special Purpose A/D Converters
SigmaDSP Audio Processors
ad1974
Audio A/D Converters
adau1701
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Hi CelsoSC,
Did you try enabling the TDM output mode? Please see the attached picture.
0160.bc43d4d4bfe367926c4e299ea7a118c9.jpg
Hello BrettG,
Yes I have TDM output mode box checked.
What would be the correct settings in the Serial Output 1 Panel to get 8 Channel of auido in fs=48000 24 Bits format with Pulse Frame Sync.
Is there any incompatiblity in using I2S input and converting to TDM output?
Kind regards
I currently don't have an evaluation board on hand to test this, but I will give it a try on Monday next week when my shipment of boards arrives.
Please try the attached project file. I think the missing link was the Output BCLK setting (OBF). For TDM8, it should be set to "internal clock / 4".
Here's the corresponding page in the datasheet:
I'm not sure about the "Out TDM 8 Ch" setting on the MP configuration register, but it might be a typo because the corresponding setting (0110) is listed as "Reserved" in the datasheet. Please use the normal SDATA_OUT0 setting.
Thank you BrettG,
you where right, settings must be SDATA_OUT0 to get TDM on the output.
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