adau1445 serial output data width issue
I have set adau1445 serial output line to TDM2 16bit 48Khz slave mode, and inside DSP, I'm using a Tone (Lookup/sine) block to generate 2Khz sine wave to the serial output line. From what I've probed, the serial output data is always 24 bits, i.e. the lower bits not set to 0s. According to the datasheet(rev. A), "The output stream always has space for 24 bits of data, but if the word length is set lower, the extra bits are set as 0s.", aparently it's not what I'm seeing. Do you guys know why? Thanks.
Audio Signal Processors
adau1445
SigmaDSP Audio Processors
Hi Rong Shen,
I've confirmed this today on my hardware in the lab. I've sent an email to the designers to find out why this function is not working as advertised. I'll respond when I have more information.
A workaround which unfortunately requires a few DSP instructions is as follows:
Shift 8 bits to the right (multiply by 1/256, which is 32768 in 28.0 format).
Shift 8 bits to the left (multiply by 256, or 4^4). It would be nicer to multiply by 16^2, but unfortunately we can only represent values up to 15.999... in our DSP.
I have included a picture of this workaround here. I've tested it and it works on my hardware. Note that the DSP readback always shows the bottom byte as 0x00.
It's certainly not elegant, but it will get the job done for now until we find out what's going wrong with the serial output ports.
Hello Rong Shen,
I have bad news. According to the designers, this feature was intended to be included in the design, but was removed very late in the design process.
This information was not properly communicated to the engineer in charge of documentation, so it slipped through and found its way to the datasheet.
So, you will have to use my workaround in order to properly clear the lower bits.
To clear the lower 4 bits, you'll need 3 multiplies per channel:
Shift 4 bits to the right (multiply by 1/128, which is 65536 in 28.0 format).
Shift 2 bits to the left (multiply by 4 in 5.23 format).
Shift 2 bits to the left (multiply by 4 in 5.23 format).
To clear the lower 8 bits, you'll need 5 multiplies per channel:
Shift 8 bits to the right (multiply by 1/256, which is 32768 in 28.0 format).
Shift 2 bits to the left (multiply by 4 in 5.23 format).
Shift 2 bits to the left (multiply by 4 in 5.23 format).
Shift 2 bits to the left (multiply by 4 in 5.23 format).
Shift 2 bits to the left (multiply by 4 in 5.23 format).
In the end, this shouldn't cause too much trouble if you have available space left in program RAM.
I will make sure that the Word Length settings in the Serial Output Port registers are removed in the next datasheet revision.
Thanks for your help in identifying this datasheet error.
Message was edited by: BrettG - corrected spelling
Thanks for the information. Does this data width issue also apply to the serial inputs? I also have some suspicions on correctness of the serail data (input and output) delay - bits [5:3] (I haven't got time to look into the details), are they supposed to work properly? Thank again for the help.
Hi Rong Shen,
The only item that appears to differ from the info in the datasheet is
the word length on the serial outputs.
This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.
Thank you,
EZ Admin
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