ADAU1701 as I2S slave
Hello,
I am trying to transfer 48 kHz digital stereo audio from a slave ADAU1701 to an external master through the I2S interface. I can however only get a partial data transmittal between the two devices. The master can be configured for either 16 or 24 bit audio, which results in one of the following two signal sets:
16 bit stereo:
MCLK: 12.288 MHz (fs * 256)
LRCLK: 48 kHz (fs)
BCLK: 1.536 MHz (fs * 32)
SDATA: Slave ADAU transmits data for the left channel, but nothing for the right channel
24 bit stereo:
MCLK: 12.288 MHz (fs * 256)
LRCLK: 48 kHz (fs)
BCLK: 2.304 MHz (fs * 48)
SDATA: Slave ADAU transmits data for the left channel, but only partial data for the right channel
I think my problem is that the master does not add “empty” BCLK cycles to achieve BCLK = 64*fs. This leads to my questions:
Does the ADAU1701 require 64 BCLK cycles per LRCLK cycle in slave I2S mode to operate correctly?
Can the digital slave interface of the ADAU1701 be configured to accept either 32 or 48 BCLK cycles per LRCLK cycle?
Thanks,
Peter
Audio Signal Processors
i2s
SigmaDSP Audio Processors
adau1701
Hello Peter,
No, the part will not be able to operate in this mode. It was designed for standard I2S which is always 32 bit clocks per channel. It is not flexible enough to be able to take in the data any other way.
I tried to think of a way to trick it but there was only one way I could think of. It would require some hardware glue and I do not think this would be easy. If you could swap the channels and send out another data stream then you can use two of the serial input ports and pick up the audio on the serial input channels 1 and 3. I do not know what you are using as the source but I would guess that this is not possible.
Dave T
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