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ADAU1466 With External Multi-Channel SPI Delay Issues/Questions

SigmaDSP & SigmaStudio snageli Oct 7, 2019 00:00 0 replies Original on forum ↗
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snageli Question
Oct 7, 2019 00:00

SETUP

ADAU1466 Dev Board

EEPROM swapped with 23LC1024 SPI RAM (1Mb)

Sigma Studio v4.4

SPDIF In to SPDIF Out

External SPI Configuration

48kHz Sampling

The first output of the SPI delay always has a difference in delay in comparison to the other channels once the cell setting is grown to have more than 1 channel. Example: In this case I have the external Delay set to two channels where delay Max and Cur is set to 0 samples but I measure a difference of about 15ms (720 samples) between them. If I increase the Max and Cur delay the offset is there in addition to whatever the Cur value is. If I grow the delay up to the max of 4 channels the first delay is always offset this much by any of the other channels, why is this the case? I included an impulse response showing this delay offset.

In my current development I have found that setting the SPI Bitrate clock higher than 15kHz at any point results in significant distortion. The delay tracks appropriately but I go from 0.0001% distortion to about 4% distortion. The datasheet specifies the ADAU1466 SPI Master Interface fsclk_m = 24MHz. The 23LC1024 is capable of 20MHz. When I scope the MISO/MOSI/SCLK lines of the SPI master port (cell setting to just 2 channels) it does not appear that I have exceeded the SPI interface capability at that point (There are still clock cycles available for more delay time).

My understanding is that if the external delay is set to more than 1 channel that all channels will follow the setting for Max and Cur delay settings. The only way around that is to use more than one External Delay (multiple SPI RAM parts). Will the external SPI Delay ever be updated where it would allow you to set different delays for each channel?

Thanks!

Audio Signal Processors

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SigmaDSP Audio Processors

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External-SPI.PNG
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