How to enable cache in my c program

Hi Sravan,

Regarding “I am working on SHARC - 21489 . I want to use cache in my application can any one please help me how to enable cache in the CCES project.”

The processors contain an on-chip instruction cache that enables three-bus operation for fetching an instruction and four data values.

After a processor reset, the cache is cleared (it contains no instructions), unfrozen, and enabled. From then on, the MODE2 register controls the operating mode of the instruction cache as shown below.

• Cache disable. Bit 4 (CADIS) directs the sequencer to disable the cache (if 1) or enable the cache (if 0).

• Cache disable external memory. Bit 8 (EXTCADIS) directs the sequencer to disable the cache for external memory (if 1) or enable the cache (if 0). (Only applies to ADSP-214xx models)

• Cache freeze. Bit 19 (CAFRZ) directs the sequencer to freeze the contents of the cache (if 1) or let new entries displace the entries in the cache (if 0).

Hope this helps.

Please let me know if you have any further queries.

Thanks,

Harshit

Hi Harshit,

Thanks for the response and yes it is working, by default cache is enabled in program

Regards

Sravan