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No output from ADAU1761

SigmaDSP & SigmaStudio atoktoto Dec 4, 2021 00:00 1 replies Original on forum ↗
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atoktoto Question
Dec 4, 2021 00:00

My goal is to get ADAU1761 working with Teensy 4.1 Audio library. I have an ADAU1761 on a custom board designed based on eval board but without the clock generator. I'm programming it from the microcontroller, with the code generated from SigmaStudio.

The basics seems to work:

- I get ACKs while programming

- After the programming is done, reading the register 0x4002 i get: 00000100 10010111 00000000 00000100 00100001 00000011 which I interpret as a successful PLL lock.

I'm generating a sine on I2S from Teensy as well as added a sine source to the DSP code but I'm getting no output from the analog outputs.

Please advise :)

The Teensy library is limited to following clocks:

BCLK: 2.82 Mhz

MCLK 11.29 Mhz

LRCLK 44.1 kHz

Audio Signal Processors

SigmaDSP Audio Processors

adau1761

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DaveThib Reply
Dec 6, 2021 00:00

Hello atoktoto,

The frequencies you mentioned from the library are fine. I am not sure what frequency you are running the core. I also do not know what the serial port settings are? Attach the SigmaStudio Schematic.

So what is the clock master for I2S? Is it the Teensy?

Your project you showed on the screen only sends tones from the core to the outputs. The signals from the serial input port will not be included but you may realize that.

You seem to have the analog routing correct for output from the DACs. but there are a few other settings to look at. Send over your project.

There is likely to be an issue with the loading of the project file. Are you using the header and C files that are in the System Output files? They will have the required delays etc. The PLL register does show that it is locked. So it does look like you are writing correctly to the part.

Dave T