Soft clipper in the ADAU1787 fast DSP

Hello Dpan,

The fast DSP is not a general purpose DSP, it is basically a filter engine that calculates BiQuad filters VERY fast. So you are limited by what you can do with a BiQuad. We did add a few more functions with the 1787 but not a lot.

So you will have to use the SDSP for the soft clipper.

Dave T

Hi Dave,

Thanks for responding. My question is: the blocks listed under the Fast DSP include: Hard Clipper, mixer (used as a sum), multiplier and T connection. Why can't you use those blocks to create a cubic soft clipper as defined in the algorithm description here:

https://wiki.analog.com/resources/tools-software/sigmastudio/toolbox/nonlinearprocessors/standardcubic

I wired a schematic using those blocks and all the lines are in blue. I can send you my dspproj if it is not obvious how I implemented the soft clipper in the fast DSP. My question is: Is there something I don't know about the Fast DSP operation that prevents this from working? I'm able to link and compile the project without errors. The eval board I ordered hasn't arrived yet so I can't test it on hardware.

Thanks,

Davis

I'll answer my own question. Technically you can implement a soft clipper as described above. However, it is extremely expensive in terms of instruction cycles. My implementation requires 43 instructions, which is more than the instruction cycle budget if you need to run the fast DSP at 768 kHz (32). Running the fast DSP at 384 kHz only gives you 64 instructions.

Hmm, maybe there is a bug in SigmaStudio or a flaw in my understanding of how to route signals through the fast DSP. When I remove everything except wiring one 768 kHz ADC input to one fast DSP output, I still get a message stating that instruction cycle count is 43.

Dpan,

Can you share the screen shot of the Output Window in SigmaStudio that shows 43 instructions? This may be in relation to the SDSP instead of the FDSP. The list of code at the bottom actually shows the number of FDSP instructions needed.

Your other answer is correct, the FDSP is a reduced instruction set DSP optimized for latency performance. As a result, it takes less instructions to perform some tasks, but some of the more instruction-intensive tasks are better suited for the SDSP.

Here is the screen shot you requested:

In addition, I also attached the dspproj file I used:fast DSP wire.dspproj

Here is the text from the Output window:

###### IC 1-Sigma ######
Sigma Studio Version 4.7. Build 0, Rev 1828

Analog Devices Compiler for the 3rd generation SigmaDSP core.
Build date = 4/5/2022 at 11:20 AM

## Summary ##
(Note: Estimates are based on a 48 kHz sample rate)

Instructions used:
43 (out of a possible 32 )
Modulo Data RAM used (X Memory):
1 (out of a possible 2048 )
Non Modulo Data RAM used (X Memory):
0 (out of a possible 2048 )
Parameter RAM used (Y Memory):
9 (out of a possible 2048 )

Instance Cycles Inst Data Coeff Other
(max)
SafeLoadCode 20 20 1 8
Beginning 17 17 0 1
End 6 6 0 0

Subroutines called:
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total 43 43 1 9
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
(%) 134% 134% 0% 0%

Files written:
program_data.dat - load file for downloading code using ADI loader
hex_program_data.dat - load file for downloading code using microcontroller
ParamAddress.dat - Parameter RAM locations for schematic instances

###### IC 1-Fast ######

Total Number of Program Instructions: 1 out of 64
Percentage of Program Used: 1.5625%

###### IC 1-Sigma ######
ADC1
Output1
-
_________________________________________________________________________________________
ADC1
Input :
Output adc_0,
---------------------------------------
Output1
Input : adc_0,
Output
---------------------------------------

###### IC 1-Sigma ######
0 - out_0 = adc_0 ;

My issues with link-compile-connect with a simple passthrough of the fast DSP running at 768 kHz are also covered in this topic: "ADAU1787 test: adc2/3 to fdsp to dac"