ΣSigmaStudio Ask AI Русский Log in

ADAU1761 POR

SigmaDSP & SigmaStudio keddy Aug 10, 2016 00:00 1 replies Original on forum ↗
Subscribe
keddy Question
Aug 10, 2016 00:00

Hi,

I got one customer who used ADAU1761 for beamforming mic
array for BT handsfree application in car infotainment system.

However, they faced an intermediate issue as shown below:

Current condition proper normal start up Radio the ADAU1761
initialization was working fine.

If apply a power supply interruption and some time the re-initialization
was not happen to the IC. But the complete code was already loaded by
controller.

Is there any special trick to re-init for short time power interruption of this IC? Because there is no Reset pin on this IC.

This IC was only apply POR sequence, if we face such problem in terms of
time, what shall we do to ensure the IC to get reset properly?

I searched the EngineerZone and read the datasheet. There is one portion on the POR
sequence in datasheet page 24. So should I suggest them to add a delay for
about 14ms in the SW by the uC?

Or should I suggest them to add a power up timer block in SigmaStudio to do the delay for
proper initialization?

Kindly please advise and let me know ASAP.

Thanks and best regards,

Keddy Yang

Audio Signal Processors

SigmaDSP Audio Processors

adau1761

dd0d2ebdcb558bc4da64cf74eeaed830.png
dd0d2ebdcb558bc4da64cf74eeaed830.png
dd0d2ebdcb558bc4da64cf74eeaed830.png-486x487.png
dd0d2ebdcb558bc4da64cf74eeaed830.png-486x487.png
3e42d91a6cc1b6acff67748f5349d5a2.png
3e42d91a6cc1b6acff67748f5349d5a2.png
3e42d91a6cc1b6acff67748f5349d5a2.png-562x207.png
3e42d91a6cc1b6acff67748f5349d5a2.png-562x207.png
DaveThib Reply
Aug 15, 2016 00:00

Hello Keddy,

You cannot implement this timer in the DSP because the state of the DSP is unknown. For that power up timer to function the DSP program must be fully loaded and the part properly initialized.

The question is if the power interruption was long enough for the power rails to go down and then power back up in the proper timing sequence as shown in figure 29. Since I would guess that this cannot be guaranteed then they will need to detect this condition and power cycle the part. Do they have control over the power to the part from a controller IC?

There is no hardware or software reset so the only way to do a full reset is to power cycle. The only suggestion I can give is to disable the core (COREN bit in the Clock Control Register) and then disable the PLL. wait for a few milliseconds, and write the correct settings for the PLL and re-enable. Then wait for the PLL to lock and then enable the core and load in the DSP program.

This is the closest thing to a reset that you can do without a power down.

Thanks,

Dave T