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adau1761 - initializing spi problem

SigmaDSP & SigmaStudio genp Mar 26, 2015 00:00 2 replies Original on forum ↗
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genp Question
Mar 26, 2015 00:00

I am working with ADAU1761, initializing it over spi port from a microcontroller.

Initializing spi communication mode is done according to the datasheet (pulling CS low 3 times after power-up, or doing 3 fake writes).

It worked fine on prototype boards and first small run of a product, but the first production run surprised me - dsp does not initialize in most cases. Boards comparison didn't give any answers - everything seems the same, thought small modifications have been made to the board.

When i started to debug, I've noticed that after few attempts (with emulator on a microcontroller) it runs fine every time. The only difference is that debugging session doesn't cycle power on a dsp. When power is cycled, initializing dsp doesn't work.

I've made a conclusion that if spi port is successfully initialized on a dsp and power is not cycled, spi works and dsp initialization is fine.

But after power cycling spi mode is not initialized right for some reason.

Next I inserted data verification at every write to dsp during initializing, returning last number of verification error.

And I've found that the first 5 writes give an error, after that all writes are ok.

So I've implemented initialization retry if an error happened during initializing.

And it seems that at the second attempt initializing always works.

To me it seems like the first 5 writes at a first initializing attempt serve to initialize spi port, after that everything is fine.

I even removed the initial 3 low pulses on a CS, still the same.

So it looks like I've found a way around the problem, but I don't like it, since I don't understand what is going on.

I've attached the routines I used for initializing.

If anybody can give me an idea on this problem, I will highly appreciate it.

Gennady

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adau1761

genp Reply
Apr 2, 2015 00:00

Resolved. You can't read from dsp during initialization until pll control is written and pll is locked.

That is why all registers written before pll control didn't verify, and the rest did.

EZAdministrator Reply
May 8, 2019 00:00

This question has been closed by the EZ team and is assumed answered.