ADAU1446 I2S sample rate
Hi!
We have a custom board with a ADAU1446 SigmaDSP and a AD1939 CODEC, both running with a master clock of 12,288MHz and sample rate of 48kHz. We would like to connect a Bluetooth board/chip over I2S. The setup works if we set the ADAU1446 as slave and the bluetooth as master, BUT we noticed a problem:
- the source (song send with mobile phone connected over Bluetooth) was a 44,1kHz .wav-file and at the output we get the song transposed. Obviously its a sampling rate conversion problem.
1) Is there any possibility to change the sample rate with this setup, without move to the ADAU1445/ADAU1442?
2) Can we expect the same problem with SPDIF? Otherwise, it doesn't make sense to enter direktly to the DSP, since SPDIF isn't always in 48kHz.
Best regards,
grimbart
Audio Signal Processors
bluetooth
adau1446
wav
i2s
48khz
Integrated/Special Purpose A/D Converters
ad1939
SigmaDSP Audio Processors
44.1khz
asrc
Audio CODECs
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Hello Fabio,
I guess this depends on what sampling frequencies you really need to run at. If you need to run at 48 kHz and only sometimes at 44.1 kHz then changing to the ADAU1445 with built in ASRCs could solve that problem and allow you to run at two different sampling rates.
If you do not have to run at 48kHz then you can change the MCLK oscillator frequency to 11.2896 MHz.
The other way is to change the settings of the ADAU1446 so that it uses the incoming clocks to drive the DSP and the output serial ports. This can get a little tricky but can be done. Then you will have to change the way the AD1939 is clocked. You can have it chase the incoming LRCLK frequency instead of using the MCLK input to drive its internal PLL.
The only complication with this method is that the PLL loop filter components will need to be changed. See figure 30 on page 30 of the AD1939 datasheet for details on the loop filter component values.
To run the part with only LRCLK as a clock you will need to change the PLL clock source to ALRCLK or DLRCLK depending on which pin you use. This is found in bits 5&6 of register 0x00, PLL and Clock Control Register 0.
To advise you on the proper clock settings on the ADAU1446 I will need to have much more detail about your board and the clocks. Schematics and SigmaStudio project would be helpful. We can setup a private message so that you do not need to share these details on the public part of this forum.
Thanks, Dave T
Hello Dave,
Thank you for the fast reply!
We have done the most development with the ADAU1446 until now, so it would be easier to let anything as it was... Are there big differences to the ADAU1445/1442 and between this two (except the number ASRC clock domains and the packaging?).
Unfortunately, I think that I did not explain exactly our problem. We should expect, that our customers plays songs with different sample rates (e.g. 44.1kHz and 48kHz). We have made other tests today and we noticed, that the audio were not transposed, but has some kind of interference, maybe a (very big) jitter, due to the different sample rates of the source (44.1kHz song sample rate) and sink (48kHz DSP master).
For the test, we moved to the evaluation board of the ADAU1446 and put the bluetooth I2S output on the serial input 0 (SDATA_IN0, LRCLK0 and BCLK0). I attach a little SigmaStudio test schematic with the Hardware configuration we used. I am not shure about the serial I/O configuration. the channels 2/3 we only used for some analog audio tests...
Is it possible to solve with the ADAU1446 or should we move to the ADAU1442/1445?
Best regards
Hello Fabio,
I somehow missed your reply. How is this project going and do you need any assistance?
Sorry for the delay.
Dave T
This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.
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EZ Admin
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