Decimation and Multi-Rate with Sigma Studio?

The easiest approach is to use one of the larger chips, but I understand the temptation to stick with -1701. I need so much I/O in my design that I just went with two -1701s.

For a single -1701 solution, I have only done downsampling, but the principle is the same: you use an upsampling filter, then perform your process at the single speed rate using two or four streams that feed each other sequentially within one sample period. This is tricky if your process needs filters though, I would guess you've have to code them manually which would cost you more instructions than you might save.

Hello cbrew and jon71,

An example of multi-streaming is shown below, where four streams are switched through a single delay to coax an arena-sized echo from a -1701. This makes use of ADI's synchronous multiplexer block, which I suspect was inspired by this earlier post of jon71: https://ez.analog.com/message/71684#71684

This technique is also helpful reusing compute-intensive algorithms such as divide and square root.

BTW -- I had posted this awhile ago but many search attempts could not locate it today. Fortunately I still had the project file.

Best regards,

Bob

Right, Bob, that was the downsampling application. But that's easier because it runs at a fraction of Fs rather than a multiple. Carl wants to run a process at Fs * 2 or * 4, which requires an upsampling process followed by processing the two or four upsamples within a single sample period. This is a frequent DSP application, but tricky within SigmaStudio because the filters are all modules that run at Fs.

HI all:

Please consider using the most recent version of SigmaStudio (~Beta 3.12.2) where we recently introduced the ability to do multirate processing graphically but only on the 1452 family of ICs. Sorry, this is not available (and most likely cannot be made) on the 1701. Also, keep in mind that downsampling and upsampling do not come for free. There is a fair amount of filtering needed to remove aliasing when doing this.

This is a new feature on SigmaStudio so please set your expectations accordingly.

Regards

Miguel

Thank you for your response. I could probably run my entire design on a 1452 at 96kHz without multi-rate schemes due to the higher core rate. Unfortunately that chip doesn't include ADC's or DAC's. For my low real-estate design my goal of avoiding an extra part (audio Codec) is negated by having to add external ADC's and DAC's. I would love to see see a chip with the higher core rate AND on-chip converters.

Jon, you are correct. Simply down sampling the signal doesn't change the number of instructions available because all the modules are still running at the fastest Fs rate.

Hi MigCha,

could you share please either here or per e-mail a copy of the SigmaStudio Beta 3.12.2? It would be interesting to start exploring the capabilities of the ADAU1452 as a platform for a multi-rate system.

Best Regards,

Piero

Trying to ask a follow-up question in this exchange about multirate on the ADAU1701. What I'd like to accomplish is to clock the ADAU1701 on-chip ADC and DAC at a 96k rate and decimate/interpolate by a factor of 2 using the synchronous mux/demux described in Bob's project. Then I'd like to run all the signal processing at a 48kHz rate.

However, it's not clear to me how to do this--is the ADC and DAC sample rate governed by the "Program Instructions" setting? If so, I cannot have both a 96k sample rate and the full 1024 instructions, right? (In case you were wondering, my goal is to use the higher DAC and ADC sample rate to reduce the latency. However, our algorithm uses 694 DSP instructions and therefore is too complex to operate at 96k, and we are for now married to the ADAU1701. I know that's not proper multirate because I am missing the filters, but our product's signal bandwidth is under 5kHz.

If anyone could weigh in on this, it would be appreciated.

Thanks,

John