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ADAU1761 BPF (Bits Per Frame) field in R16 register

SigmaDSP & SigmaStudio mfortini May 23, 2011 00:00 7 replies Original on forum ↗
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mfortini Question
May 23, 2011 00:00

I don't fully understand the meaning of the BPF field for I2S audio.

The manual states that "The valid data formats are I2S, left-justified, right-justified (24-/20-/18-/16-bit)". However, I can only see 64, 48, 128, and 256 as BPF settings.

How do they map?

Thank you in advance

Audio Signal Processors

i2s

SigmaDSP Audio Processors

adau1761

ADIApproved Reply
May 25, 2011 00:00

The bits per frame setting is related to the number of channels in the audio stream.

64 bits = two channels (24 bits plus 8 bits of zero padding per channel x 2 channels)

128 bits = four channels (24 bits plus 8 bits of zero padding per channel x 4 channels)

256 bits = eight channels (24 bits plus 8 bits of zero padding per channel x 8 channels)

48 bits = two channels (24 bits with no zero padding per channel x 2 channels)

Selecting the number of bits per channel changes the zero padding scheme

24 bits = 8 bits of zero padding

20 bits = 12 bits of zero padding

18 bits = 14 bits of zero padding

16 bits = 16 bits of zero padding

Selecting the MSB position determines how the data aligns to the frame

Left Justified = data's MSB aligns with the leading clock edge of the frame

I2S = data's MSB comes 1 BCLK cycle after the leading clock edge of the frame

Right-justified = data's MSB comes 8 BCLK cycles after the leading clock edge of the frame

mfortini Reply
May 27, 2011 00:00

Thank you Brett,

I don't fully follow you: I can see the BPF setting, but I can't seem to find the "bits per channel" setting you mention.

In I2S, since I'm using the ADAU as BCLK and LRCLK slave, I can communicate only if I set the host CPU to use the S24_LE format.

Thank you

ADIApproved Reply
May 27, 2011 00:00

Sorry for the confusion. Hopefully this clears it up:

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mfortini Reply
May 27, 2011 00:00

Ok so to sum it up: the IIS format, which is fixed at 1 BCLK delay from the LRCLK edge, works only in 24 or 32 bits per frame mode.

Is this right?

Thank you

ADIApproved Reply
May 27, 2011 00:00

I assume you mean 24 or 32 bits per channel, not per frame, since I2S is stereo by default.

I have not tried to output I2S data in 24 bits per channel mode because the codecs and digital audio interfaces that we typically connect with will work with 32 bits per channel by default. However, I agree with you that the serial port should work in 24 bits per channel or 32 bits per channel mode.

The serial port settings are, for the most part, orthogonal, and allow you to program the chip to match the expected format of your target interface. It really just depends on how the other ICs in the system expect the data to be formatted.

abhijeetb89 Reply
May 29, 2014 00:00

Hi BrettG,

I am trying to configure codec as 16 bit codec instead of 24.

Because I want to further compress and encode the data to

4 bits so that compression ratio is 4 to 1. (ADPCM compression).

As you said, number of bits per channel will change zero padding scheme,

so if I select zero padding scheme as 16, I can get 16 bit data.

But it is still unclear to me how to select number of bits/channel so that I will

have 16 bit zero padding. Can you please explain?

Thanks.

maheshmuni Reply
Jul 4, 2016 00:00

HI BrettG

I am working on ADAU1761 Codec chip. By default the Codec is configured for 24 bit input data which is receiving data 32 bit with MSB sign extended for 8 bits. My requirement is to capture the data in 16 bit and stream it. Because of 24 bit (32bit data type) the memory requirement is almost double as of 16 bit. Tried with sigmastudio under digital Setup tab, under Control1, BCLK doesn't have configuration to select the data as 16 bit. I have connected the ADAU1761 with BF707.

Can you please help the configuration to capture the data as 16 bit on ADAU1761?

Thanks.