ADAU1761 Reserved Register Bits

In SigmaDSP, generally the reserved register bits should be zero, but it's always a good idea to check the SigmaStudio output files to confirm.

After compiling the project, use the "Export System Files" function and look for the file named name_IC_1_REG.h.

This file contains the settings for all of the registers in your project. I've attached an example, which is a basic ADAU1761 setup using the all inputs - all outputs preset.

Message was edited by: BrettG... 100803. Wrong files attached to post.

Actually, what I'd like to know is WHICH bits in the registers may NOT be read back the same as when written, i.e. are volatile. If someone was to write to and then verify the register block, which bits would have to be exempt from the verification?

The only bits that should potentially read back a value different from what you might write to the register are the read-only bits. These bits are set by the IC itself, so writes to them through the control port will not be reflected upon readback. On the ADAU1761, these read-only bits include the PLL lock flag, the CRC hash sum, and the Watchdog error bit. The other bits will default to the values shown in the last column of Table 33 in the ADAU1761 datasheet.

Jerad,

Thanks for clarifying that.

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