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Q&A from Analog Devices EngineerZone: SigmaDSP/SigmaStudio and DSP discussions (12 topics).
12 topics · 34 messages
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Adau1701 selfboot
Hello, I am designing a circuit for the ADau1701 IC. Does it support the selfboot mode when using an SPI protocol EEPROM? Thank you. Audio Signal Processors hardware SigmaDSP Audio Processors adau1701
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How to simulate and circuit with an ADAU1452?
I have an project done on Sigmastudio to run on ADAU1452. I want to previously simulate the whole PCB Before building ir on physicall Hardware. I know that The chip have an Ibis model.L Ltspice is a s
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Slave mode of clock for PDM interface
Hello. Everyone. Thank you for your help. I am trying to set the slave mode of clock for the PDM interface with ADAU1787. But what I can only find in SigmaStudio is the clock for the PLL. It will be m
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ADAU1452 and PCM1802, Problems writing SPI EEPROM and no signal from ADC
Developing a ADAU1452 based board, using PCM1802 ADCs and PCM5102A DACs Have the board up and running. All PSU voltages within spec I can program it through I2C via Wondom ICP3 I can flip an GPIO pin
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ADAU1467 I2S input slave mode
Hi everybody. I am trying to connect our ADAU1467 based mainboard with our wireless audio receiver board based on Texas Instruments CC8531. As the CC8531 in receiver mode can only be set to clock mast
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ADAU1452 drive strength and equivalent resistance or impedance
In the datasheet there is only information about maximum current versus drive strength setting, ie at 3.3V Lowest 2mA Low 5mA High 10mA Highest 15mA A simple calculation implies that the R-ON for the
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ADAU1701 PLL modes for 45.1584 & 49.1520 MHz MCLKs?
Hi guys, hope you could help me figuring out, if a allo kali reclocker with its 45.1584 & 49.1520 MHz MCLKs is compatible to the ADAU1701 and if so, which PLL_modes to use (s. Setting the PLL mode for
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ADU1446 sleep mode
Hi! We have a custom board with a ADAU1446 SigmaDSP (selfboot from EEPROM), a AD1939 CODEC and a PIC microcontroller. -Is there any possibility to run the DSP in a sleep mode (less then 40mA) when aud
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AD1954 master/slave setting
Hi, I want to use the ADC->AD1954 to implement my project.I set the serial interface mode of the ADC to be master mode and I^2S.So I need to set the serial infterface mode of the AD1954 to be slave mo
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ADAU1446 Flexible TDM Configuration
I am struggling to successfully configure an ADAU1446 for the following scenario Serial Input 0 - Provide 48kHz master clock to external stereo codec with data format of 24 bit TDM2 Serial Input 1 - P
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ad1937 - asking internal PLL
Hello, AD Engineers. I am testing ad1937 DAC slave mode and I have some noise issue from ad1937. Actually I am using independent clock source for DSP and AD1937 MCLKI. I think that different clock sou
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AD1937 - Can I set ABCLK per frame to over 64cycles in I2S stereo mode?
Hello, AD engineers. I am using AD1937 for recording and I am just checking ad1937 for what kind of BCLK and LRCLK I can use when I record. I have several questions about BCLK frequency for ADC operat