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Q&A from Analog Devices EngineerZone: SigmaDSP/SigmaStudio and DSP discussions (55 topics).
55 topics · 237 messages
Filtered by: #datasheet_2f00_specs ✕
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[ADAU1452] Internal PU/PD States During and After Reset
Hi, We have a question regarding the status of the internal pull-up/pull-down (PU/PD) resistors during and after reset for the ADAU1452. Upon checking the ADAU1452 datasheet, we found a reference to i
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AEC rating?
Datasheet doesn't indicate an AEC rating. Is it AEC-Q100? adau1401a Audio Signal Processors Datasheet/Specs SigmaDSP Audio Processors
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AEC Block
Hello, I have a project build for ADAU1467 in which I use the AEC block for testing. I would like to know if there is a cheaper DSP that could use that block in which I can also add other blocks like
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Inquiry regarding High-Performance ANC Solution for Headphone
To the Analog Devices Technical Support Team, Hello, I am the Lead Product Strategist at a tech startup based in South Korea. We are currently developing a premium wireless headphone targeting mass pr
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ASRC Lock on ADAU1466
Subject: ADAU1466 ASRC0 will not maintain lock with XU316 I²S (24-bit/48 kHz) Hi ADI team, Setup ADAU1466, self-boot from EEPROM verified Source: XMOS XU316 USB→I²S from Windows, 24-bit
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Which Registers control SPI Mode and other configuration?
The datasheet warns that "The master port must be reconfigured in software before using a protocol other than the one configured at boot time." So, how is this done? Which Registers control this confi
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ADAU1787 serial port latency
Hi All, A project I'm starting on soon ideally would have lower noise and distortion figures than what the on board ADC's and DAC's of the ADAU1787 can do. Is the latency through the serial ports and
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Beginner DSP Build with ADAU1701 – Need Optimization Advice
Hi everyone, I'm new to SigmaStudio and DSP audio design in general, and I’ve just finished setting up my first project. I’d love to hear feedback from more experienced users on how I can improve or o
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PeakFullRangenogain wiki page is missing
If you click F1 on any of the "Peak Full Range(no gain)" algorithm blocks, it goes to https://wiki.analog.com/resources/tools-software/sigmastudio/toolbox/dynamicsprocessors/peakfullrangenogain which
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Master control port registers for address width and value?
Is it possible to set the SPI address width using the DSP control registers? I'm asking about the 2-byte (16-bit) versus 3-byte (24-bit) address variations. On a similar note, is it possible to set th
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Adding some information that is missing from the DSP checksum calculation documentation page
The DSP Wiki page at https://wiki.analog.com/resources/tools-software/sigmastudio/toolbox/basicdsp/checksum discusses how to calculate the checksum for a running DSP but some important information was
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MIPS usage
Hello, I have a big project that use 2 ADAU1467 The compiler gives me MIPS usage for both, one is at 69% one is at 93% So I have a few questions regarding MIPS usage : - I guess that the chip's temper
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VDRIVE with external regulator
Hi. I am designing a product using an ADAU1452. I wish to use an external 1.2v LDO regulator for the DVDD supply. On page 192 of the datasheet is says in this case I can leave the VDRIVE pin floating.
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What is SPI mode CPOL CPHA for ADAU1701?
There seems to be quite a bit of confusion over ADAU1701 and SPI mode. What is it?! This post seems to indicate it's SPI mode 0 (CPOL=0 CPHA=0), RE: ADAU1701 SPI mode This says (not specifically about
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Aliasing when using Downsampler
Dear Team, I am using the ADAU1452 REV BZ Board. My system Sampling rate is 48kHz . I would be taking input from the oscillator and downsampling it to 8kHz . I know there is a problem with the LPF tha
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MCLK Source Select on ADAU1467 eval board
Whilst reviewing the schematic for the EVAL-ADAU1467 board, I've noticed an 0R00 resistor (R35) that continuously connects the crystal to the XTALIN/MCLK pin of the ADAU1467 DSP. Does this not comprom
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Audible noise issue
My customer said that audible noise occurred during development in the environment below. Is it because of the mismatch in sampling frequency of I2S input and output? They want it to work normally whe
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Configuration of ADAU1467 multipurpose pins MPx
Hello, I am using EVAL-ADAU1467Z and SigmaStudio+ 2.3.0. In the user guide, one can read that MP15, MP14 and MP7 are connected to DIP Switch S3. These pins are dedicated IO pins, i.e. not multiplexed
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What are the differences between ADAU1860 and ADAU1861?
Hi ADI Team, I would like to ask what the differences are between ADAU1860 and ADAU1861? Currently, I only know that the packages are different. Are there any other differences? Thanks, Elvis Datashee
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Read from ADAU1761 over SPI
Hello EZ Community, I am trying to setup the ADAU1761 using SPI on our prototype board. So far I’ve had no success setting it up or reading from it. Initially i tried reaching out to technical support
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Optimization of ADAU1701 Audio Processing with BM83 – Volume Discrepancies Across Bluetooth Devices
Dear Analog Devices Support Community, We are currently integrating the ADAU1701 DSP in our product alongside the BM83SM1-00AB Bluetooth module, which serves as the master Bluetooth interface and code
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[ADAU1452] Regulations regarding the waveform rounding for the rising and falling edges of the reset signal
Hi, We have a question from Customer. Regarding the reset signal of the ADAU1452, are there any regulations regarding the waveform rounding for the rising/falling edges? We checked the data sheet, but
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Problems setting PLL up on ADAU1452
I am unable to get my custom ADAU1452 board PLL locking. The MCLKIN/OSCIN is driven by a crystal oscillator IC at 3.3V and it looks good on oscilloscope. Checking the PLL lock register never shows loc
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Output delay and other timing specs of ADAU146x audio serial ports (and SPI)
Hi, I'm trying to cross-check the timings of various high-speed signals (SPI and audio TDM) between chips that are interfaced on our board, specifically the ADAU146x, AD2428, and our host SoC (TI AM33
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How to transmit/receive SPDIF user data reliably?
For a stereo active speaker system, we need to send the same SPDIF audio and control information to ADAU1467 devices in both speakers. The approach is to make one speaker a "primary" that receives the