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Q&A from Analog Devices EngineerZone: SigmaDSP/SigmaStudio and DSP discussions (20 topics).
20 topics · 73 messages
Filtered by: #slave ✕
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MCLK issue and replicable Adau chip
Hello every , and Hello DAVE, I look into this ADIEngineerZone for long time, but this is my first time post here. I have a Bluetooth project using Adau1761, the Bluetooth chip cannot generate MCLK to
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Slave mode of clock for PDM interface
Hello. Everyone. Thank you for your help. I am trying to set the slave mode of clock for the PDM interface with ADAU1787. But what I can only find in SigmaStudio is the clock for the PLL. It will be m
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ADAU1452 and PCM1802, Problems writing SPI EEPROM and no signal from ADC
Developing a ADAU1452 based board, using PCM1802 ADCs and PCM5102A DACs Have the board up and running. All PSU voltages within spec I can program it through I2C via Wondom ICP3 I can flip an GPIO pin
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ADAU1452 incoming I2S slave clocks routed to I2S slave output
Hello All, I have the ADAU1452 DSP being slave on one of the I2S inputs and on one of the I2S outputs. MCLK is fed by a crystal. Physically the master is connected to the BCLK/LRCLK/SDATA_IN0 and SDAT
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ADAU1463 TDM16 in slave mode
Hello, We use the ADAU1463 in a system with TDM16 signal 24/32 bits on 48kHz on Serial Port 0 from a FPGA but the dsp is not working correct as slave from this input 0. Every time the systems starts t
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Is it possible to offload FIR processing to the RPi 4 NEON SIMD from the ADAU1701?
So my thought is this: since the Sharc came out, there have been advances in process and architecture making the number of coefficients that can be processed through NEON on ARM greatly increased over
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ADAU1452 SDATA_OUT3 SLAVE to CLK DOMAIN 0 does not work
Hi, i have a project with an ADAU1452 where SDATA_OUT0 is configured with LRCLK and BCLK as Master. The signal is output on SDATA_OUT0. SDATA_OUT3 ist configured with LRCLK and BCLK as Slave to CLK do
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ADAU1467 I2S input slave mode
Hi everybody. I am trying to connect our ADAU1467 based mainboard with our wireless audio receiver board based on Texas Instruments CC8531. As the CC8531 in receiver mode can only be set to clock mast
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ADAU1452 drive strength and equivalent resistance or impedance
In the datasheet there is only information about maximum current versus drive strength setting, ie at 3.3V Lowest 2mA Low 5mA High 10mA Highest 15mA A simple calculation implies that the R-ON for the
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ADAU1701 TDM In - I2S out
Hello, in my current project I'm using an ADAU1701. On my system MCU I implemented an USB-to-TDM-Interface which delivers 8 channels with 24 bits at 48 kHz via TDM8. The Masterclock is 24.576 MHz, the
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ADAU1701 TDM slave input configuration
Hello. In my project I'm trying to connect Teensy 3.5 (as master) and ADAU1701 (as slave). Previously I have done successful double I2S connection between them, and everything sounds perfect! I have 4
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USBi controlled outside Sigma Studio
Can I control the USBi (ADUSB2Z) board using my third party program (windows c# application), and NOT SigmaStudio... This is intended to work after DSP is programmed by Sigma studio. I, then, close th
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1452eval board as TDM slave?
I'm looking to interface an XMOS AVB endpoint with an adau1452eval board. The goal is to get 8 channels of audio into the dsp from an AVB link. It seems that my only option is to use TDM8 with one of
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How to route TDM audio through multiple ADAU1701s?
Hello all, We're developing an audio mixer around a ring of ADAU1701s where each receives a TDM steam from its neighbor, adds in two analog inputs and sends the mix through to the next -1701. The bloc
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AD1954 master/slave setting
Hi, I want to use the ADC->AD1954 to implement my project.I set the serial interface mode of the ADC to be master mode and I^2S.So I need to set the serial infterface mode of the AD1954 to be slave mo
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Switching I2S Slave mode to Master mode on the fly
our development involves an Arm processor using SigmaDSP to output Audio to Headphones/Speakers. Following is a simplified sequence of operations from ARM's point of view: starts up (I2S is not yet se
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ad1937 - asking internal PLL
Hello, AD Engineers. I am testing ad1937 DAC slave mode and I have some noise issue from ad1937. Actually I am using independent clock source for DSP and AD1937 MCLKI. I think that different clock sou
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multiple ADAU144x system
I'm having trouble using a SigmaDSP as an I2S slave. In all the examples I see SigmaDSP as a master but in a multi-DSP system one will be a master which drives another SigmaDSP slave and a slave codec
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ADAU1446 Serial INPUT/OUTPUT ports run mode
Hi, May the INPUT/OUTPUT ports work in master mode at the same time? If all work in master mode, the CLOCKs source is the same "MASTER CLOCKs"? or the input/output master source is not same(synchronou
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Can I use the ADAU144x as a clock master for an asynchronous clock domain?
Can I use the ADAU144x as a clock master for an asynchronous clock domain? For example, I have an input data stream that will be a slave to an asynchronous clock domain. I will route it to the ASRCs,